In Digital logic, an inverter or NOT gate is a logic gate that implements logical negation. It outputs a bit opposite to the bit that is put into it. The bits are typically implemented as two different voltage levels. Inverting NOT gates are single input devices that have an output level that is normally at logic level “1” and goes “LOW” to a logic level “0” when its single input is at logic level “1”, in other words, it “inverts” (complements) its input signal. The output from a NOT gate only returns “HIGH” again when its input is at logic level “0” giving us the Boolean expression of A = Q.
Transistor Logic NOT Gate
The operation of this circuit is simple. The input is connected through resistor R2 to the transistor’s base. When no voltage is present on the input, the transistor turns off. When the transistor is off, no current flows through the collector-emitter path. Thus, current from the supply voltage (Vcc in the schematic) flows through resistor R1 to the output. In this way, the circuit’s output is HIGH when its input is LOW.
The Logic NOT Gate Truth Table
Logic NOT gates provide the complement of their input signal and are so-called because when their input signal is “HIGH” their output state will NOT be “HIGH”. Likewise, when their input signal is “LOW” their output state will NOT be “LOW”.
As they are single input devices, logic NOT gates are not normally classed as “decision” making devices or even as a gate, such as the AND or OR gates which have two or more logical inputs
Schmitt NOT Gate Inverter Oscillator
The circuit shows a very simple low power RC type oscillator using a Schmitt inverter to generate a square wave output waveform. Initially the capacitor C is fully discharged so the input to the inverter is “LOW” resulting in an inverted output which is “HIGH”. As the output from the inverter is fed back to its input and the capacitor via the resistor R the capacitor begins to charge up.
Application of NOT Gate
- CMOS inverter for the generation of waveforms